Le poste
Tiré de l’annonce de l’employeur · Arrow Electronics, Inc. · publiée le 1 octobre 2026
At-least 6 years of experience in System Verilog HVL and C++/C At-least 6 year of experience in UVM. Experience in complete verification cycle which includes development of test plan, BFM/Driver/Monitor/Scoreboard component development and integration in test bench, stress/corner testing, failure debug, gate level simulations, assertions, …